http://www.hkepc.com/bbs/itnews.php?tid=686996&starttime=0&endtime=0
In order to lower the cost to against AMD, Intel announced to release native 2MB L2 Conroe in Feb 2007. Similarly, Merom will also get native 2MB L2 cache version at the time of Santa Rosa release. This change would bring Intel at better position to against the change of 65nm process of AMD.
The existing Intel Core 2 Duo and Xeon 3000 in the market, actually, are native 4MB L2 processors. Although they have 2MB L2 and 4MB L2 versions, the 2MB one is made by only disabling half of the L2 Cache. However, AMD is producing native 1MB L2 and 512KB L2 K8 processor to raise its cost.
The 2MB L2 Cache Conroe included Core 2 Duo E6300 (1.86GHz/1066MHz FSB), E6400 (2.13GHz/1066MHz FSB) and Xeon 3040 (1.86GHz/1066MHz FSB)及3040(2.13GHz/1066MHz FSB), where its stepping would improved from B2 to L2. They have new SSPEC and MM, and CPUID would changed from 6F6 to 6F2. However, the change would not affect those manufacturers as well as end users.
As AMD is stepping in 65nm process soon, its cost efficiency is the biggest advantage for the company to against Intel. As 4MB L2 Cache shared almost 60% of the transistors in Conroe, a cut to native 2MB L2 Cache may help in lower 20% of the cost. In fact, the L2 stepping samples have been sent to mainboard manufacturers in order to update the microcode for BIOS.
Cumps.

